GMS30C2216 Datasheet, PDF (151/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

BUS INTERFACE
6-35
6.10.2.3 SRAM Multi-Cycle Read Access
CLK
Chip Select
Address Bus
WE#
BE0#..BE3#
OE#
Data Bus
Address setup
time 0..3
cycles
Access
time 2..16
Figure 6.8: SRAM Multi-Cycle Read Access, MEMx Byte Mode = 0
Bus hold time
0..7 cycles
6.10.2.4 SRAM Multi-Cycle Write Access
CLK
Chip Select
Address Bus
WE#
BE0#..BE3#
OE#
Data Bus
Address
setup time
0..3 cycles
Access
time 2..16
Bus hold
time
0..7 cycles
Figure 6.9: SRAM Multi-Cycle Write Access, MEMx Byte Mode = 0