GMS30C2216 Datasheet, PDF (282/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

A-110
Return
Appendix A. Instruction Set Details
RET
Format:
RR format
15
OP-code
0000 01
10 9 8 7
43
0
ds
Rd-code
Rs-code
s = 0: Rs-code encoded G0..G15 for Rs
s = 1: Rs-code encoded L0..L15 for Rs
d = 0: Rd-code encoded G0..G15 for Rd
d = 1: Rd-code encoded L0..L15 for Rd
Notation:
RET PC, Rs
Description:
The Return instruction returns control from a subprogram entered through a Call, Trap or
Software instruction or an exception to the instruction located at the return address and
restores the status from the saved return status.
The source operand pair Rs//Rsf is placed in the register pair PC//SR. The program counter
PC is restored first from Rs. Then all bits of the status register SR are replaced by Rsf;
except the supervisor flag S, which is restored from bit zero of Rs and except the
instruction length code ILC, which is cleared to zero.
The Return instruction shares its basic OP-code with the Move Double-Word instruction. It
is differentiated from it by denoting the PC as destination register Rd.
Operation:
old S := S; old L := L;
PC := Rs(31..1)//0;
SR := Rs(31..32)//00//Rs(0)//Rsf(17..0); - ILC := 0; S := Rs(0);
If ( old S = 0 and S = 1) or ( S=0 and old L= 0 and L = 1 ) then trap => Privilege Error;
difference(6..0) := FP - SP(8..2); - difference is signed, difference(6) = sign bit
If difference > 0 then continue at next instructio;
else
repeat
SP := SP -4; register SP(7..2)^ := memory SP^;
difference := difference + 1;
until difference = 0;
Exceptions:
Privilege Error.