GMS30C2216 Datasheet, PDF (77/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

Instruction Set
3-15
Format NotationOperation
Rimm ADDI Rd, imm
Rimm ADDSI Rd, imm
Rd := Rd + imm;
Z := Rd = 0;
N := Rd(31);
V := overflow;
C := carry;
Rd := Rd + imm;
Z := Rd = 0;
N := Rd(31);
V := overflow;
if overflow then
trap ⇒ Range Error;
-- signed or unsigned Add
-- sign
-- signed Add with trap
-- sign
The following instructions are special cases of ADDI and ADDSI differentiated by n = 0
(see section 2.3.1. Table of Immediate Values):
Format Notation
Operation
Rimm ADDI Rd, CZ
Rd := Rd + (C and (Z = 0 or Rd(0))); -- round to even
Rimm ADDSI Rd, CZ
Rd := Rd + (C and (Z = 0 or Rd(0))); -- round to even
The flags and the trap condition are treated as defined by ADDI or ADDSI.
Note: At ADDC, Z is cleared if Rd ≠ 0, otherwise left unchanged; thus, Z is evaluated
correctly for multi-precision operands.
The effect of a Subtract immediate instruction can be obtained by using the negated 32-bit
value of the immediate operand to be subtracted (except zero). At unsigned, C = 0
indicates then a borrow (the unsigned number range is exceeded below zero).
At "round to even", C is only added to the destination operand if Z = 0 or Rd(0) is one. The
Z flag is assumed to be set or cleared by a preceding Shift Left instruction. "Round to
even" provides a better averaging of rounding errors than "add carry".
"Round to even" is equivalent to the "round to nearest" Floating-Point rounding mode and
may be used to implement it efficiently.
Register
L0 : $00000004
L1 : $FFFFFFFC
Instruction
ADD L0, L1
ADDI L0, $120
; L0 = L0 + L1 = $0
; L0 = L0 + imm = $124