GMS30C2216 Datasheet, PDF (247/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

Appendix A. Instruction Set Details
A-75
Floating-point Compare without exception (double precision)
FCMPUD
Format:
LL format
15
OP-code
1100 1011
87
43
0
Ld-code
Ls-code
Ls-code encodes L0..L15 for Ls
Ld-code encodes L0..L15 for Ld
Notation:
FCMPUD Ld, Ls
Description:
Two operands are compared by subtracting the source operand form the destination
operand and all condition flags remain unchanged to allow future concurrent execution.
The floating-point instructions comply with the ANSI/IEEE standard 754-1985. In the
present version, they are executed as Software instructions.
This instruction uses double-precision operands and it must not placed as delay instructions.
A floating-point Not a Number (NaN) is encoded by bits 30..19 = all ones in the operand
word containing the exponent; all other bits of the operand are ignored for differentiating a
NaN form a non-NaN.
This instruction can raise only the Invalid Operation exception (at unordered). If the data
type of two operands are different (unordered) the Invalid Operation exception is occurred.
Operation:
result := Ld//Ldf - Ls//Lsf;
Z := Ld//Ldf = Ls//Lsf and not unordered;
N := Ld//Ldf < Ls//Lsf or unordered;
C := Ld//Ldf < Ls//Lsf and not unordered;
V := unordered; - no exception
Exceptions:
None.