GMS30C2216 Datasheet, PDF (132/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

6-16
CHAPTER 6
The DRAM type used and the physical page size of the DRAM are specified by bits 6..4,
in the BCR. Table 8.5 shows the encoding of BCR(6..4) and the associated column address
ranges for memory areas with bus sizes of 32, 16 and 8 bits.
Columns Address Range
BCR(6..4) 32-bit Bus Size 16-bit Bus Size 8-bit Bus Size
000 A15..A2
A15..A1
A15..A0
001 A14..A2
A14..A1
A14..A0
010 A13..A2
A13..A1
A13..A0
011 A12..A2
A12..A1
A12..A0
100 A11..A2
A11..A1
A11..A0
101 A10..A2
A10..A1
A10..A0
110 A9..A2
A9..A1
A9..A0
111 A8..A2
A8..A1
A8..A0
Table 6.5: Column Address Ranges