GMS30C2216 Datasheet, PDF (120/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

5-4
CHAPTER 5
Power-down mode can be set by a program sequence as in the following example:
PowerDownIO
EQU 1 << 27 | %1110 << 22
...
STW.IOA 0, 0, PowerDownIO
LDW.IOA 0, L4, PowerDownIO
MOV L4, L4
...
; Bits 27, 25..23, 22
; set power-down mode
; wait until power-down
; I/O is executed
; execution continues
; here after wakeup
5.1.5 Additional Power Saving
The CPU clock divider control can be used for example to switch the CPU to a slow clock
during power-down for additional power savings. In the following example, the XTAL1
clock is 20 MHz, the CPU runs normally at 80 MHz and is switched back to 10 MHz
during power-down. The timer prescaler setting is changed so that a time unit of 1 µs is
kept through the power-down sequence. Using the “delayed TPR update” feature, the 1 µs
absolute time is maintained even for the time units where the TPR setting changes.
Interrupts are locked out during power-down using the L bit in SR. This is done so that the
TPR setting can be changed back to fast clock and corresponding prescaler setting after
wakeup from power-down before the interrupt handler is called. The interrupt occurs at the
time the lock bit L in SR is cleared. The power-down is initiated by executing the power-
down I/O access. The power-down is guaranteed to be effective before the next (dummy)
I/O load access is done, thus the following MOV instruction is not executed until wakeup.
The instructions to restore the CPU clock speed and the prescaler setting can thus be
placed after the dummy load and MOV instructions.
TPR_fast
TPR_slow
DelayTPRUpd
L_Bit
H_Bit
PowerDownIO
EQU
EQU
EQU
EQU
EQU
EQU
...
MOVI
MOVI
ORI
ORI
ORI
MOV
STW.IOA
LDW.IOA
MOV L4,
ORI
MOV
ANDNI
...
%00 << 26 | 78 << 16
%11 << 26 | 8 << 16
1 << 31
1 << 15
1 << 5
1 << 27 | %1110 << 22
L5, TPR_slow
L6, TPR_fast
L5, DelayTPRUpd
L6, DelayTPRUpd
SR, L_Bit | H_Bit
TPR, L5
0, 0, PowerDownIO
0, L4, PowerDownIO
L4
SR, H_Bit
TPR, L6
SR, L_Bit
; fast TPR, divide by 80
; slow TPR, divide by 10
; delayed TPR update
; Interrupt Lock in SR
; High-Global Bit in SR
; Power-Down I/O address
; TPR for power-down
; TPR after power-down
; set delayed TPR update
; set delayed TPR update
; set Interrupt Lock
; set slow clock
; set power-down mode
; dummy load
; wait till done
; next instruction is
; executed after wakeup
; restore fast clock
; allow interrupt now
; continue here after
; interrupt routine has
; been executed