GMS30C2216 Datasheet, PDF (286/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

A-114
Shift Right Immediate (Signed Double Word)
Appendix A. Instruction Set Details
SARDI
Format:
Ln format
15
OP-code
1000 010
9 87
43
0
n
Ld-code
n
Ld-code encodes L0..L15 for Ld
n: Bit 8//bit 3..0 encode n = 0..31
Notation:
SARDI Ld, n
Description:
The destination operand is shifted right by a number of bit positions specified by n = 0..31
as a shift by 0..31. The destination operand is interpreted as a signed double-word integer.
The Shift Right instruction inserts sign bits in the vacated bit positions at the left.
The double-word Shift Right instruction executes in two cycles. The high-order operand in
Ld is shifted first. The result is undefined if Ls denotes the same register as Ld or Ldf.
Operation:
Ld//Ldf := Ld//Ldf >> by n;
Z := Ld//Ldf = 0;
N := Ld(31);
C := last bit shifted out is "one"
Exceptions:
None.