GMS30C2216 Datasheet, PDF (109/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

Instruction Set
3-47
At an exception, the following additional action is performed:
• Any corresponding accrued-exception flag whose corresponding trap-enable flag is zero
(not enabled) is set to one; all other accrued-exception flags remain unchanged.
• If a corresponding trap-enable flag is one (enabled), any corresponding actual-exception
flag is set to one; all other actual-exception flags are cleared. The destination remains
unchanged.
In the present software version, the software emulation routine must branch to the
corresponding user-supplied exception trap handler. The (modified) result, the source
operand, the stack address of the destination operand and the address of the floating-point
instruction are passed to the trap handler. In the future hardware version, a trap to Range
Error will occur; the Range Error handler will then initiate re-execution of the floating-
point instruction by branching to the entry of the corresponding software emulation routine,
which will then act as described before.
The only exceptions that can coincide are Inexact with Overflow and Inexact with
Underflow. An Overflow or Underflow trap, if enabled, takes precedence over an Inexact
trap; the Inexact accrued-exception flag G2(0) must then be set as well.
The table below shows the combinations of Floating-Point Compare and Branch in-
structions to test all 14 floating-point relations:
relation Compare
=
FCMPU
?≠
FCMPU
>
FCMP
≥
FCMP
<
FCMP
≤
FCMP
?
FCMPU
≠
FCMP
<=>
FCMP
?>
FCMPU
?≥
FCMPU
?<
FCMPU
?≤
FCMPU
?=
FCMPU
Branch
on true
BE
BNE
BGT
BGE
BLT
BLE
BV
BNE
--
BHT
BHE
BLT
BLE
BE, BV
Branch
on false
BNE
BE
BLE
BLT
BGE
BGT
BNV
BE
--
BSE
BST
BGE
BGT
BST, BGT
exception
if unordered
--
--
x
x
x
x
--
x
x
--
--
--
--
--
The symbol ? signifies unordered.
Note: At the test <=> (ordered), no branch after FCMP is required since the result of the
test is an Invalid Operation exception occurred or not occurred.