GMS30C2216 Datasheet, PDF (121/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

TIMER
5-5
5.1.6 Sleep Mode
To further reduce power dissipation, the processor can be set into sleep mode. In this case,
the clock of the processor is completely switched off. When a quartz crystal is used for
processor clock generation, it is also switched off. An external reset signal or an interrupt
awakes the processor from sleep mode and the processor continues with the standard reset
procedure. Bit 10 in ISR indicates that the reset was caused by a wakeup from sleep mode.
The sleep mode can be entered by an I/O write instruction with address bits A(27) and
A(25..22) set to one. Note that any content of the internal RAM and the external DRAM as
well as the timer count will be lost during sleep mode. The sleep mode takes effect when
the I/O access is performed. After this, the processor behaves as in reset, i.e. the bus
request is deactivated until wakeup by an interrupt or reset. On wakeup by an interrupt, the
FCR setting is preserved through the reset sequence. As with the power-down I/O access, a
dummy load access could be placed after the sleep mode I/O access to ensure that the sleep
mode takes effect. Since the processor continues with a reset at wakeup from sleep mode,
an empty loop can be used as well to wait until the sleep mode I/O access has taken effect.
Note that even though sleep mode is an internal operation of the processor, bus grant must
be given so that the sleep mode set I/O access can be performed.
An interrupt signal awaking the processor from sleep mode must stay active at least until
the processor has begun executing its reset sequence. This latency time includes the startup
time of the crystal oscillator and of the PLL circuit. If the interrupt goes inactive before
this latency time has elapsed, the processor may fall back into sleep mode. In order to have
the effect of causing a processor interrupt, the interrupt signal should stay active until it is
acknowledged by the interrupt handler.
The sleep mode can be set by a program sequence as in the following example:
SleepModeIO
SleepWait:
EQU
...
STW.IOA
BR
1 << 27 | %1111 << 22 ; Bits 27, 25..22
0, 0, SleepModeIO
SleepWait
; set sleep mode
; wait until sleep
; mode I/O is executed