GMS30C2216 Datasheet, PDF (181/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

Appendix A. Instruction Set Details
AND with imm used inverted
A-9
ANDNI
Format:
Rimm format
15
10 9 8 7
43
0
OP-code
dn
Rd-code
n
0111 01
imm1
imm2
d = 0: Rd-code encoded G0..G15 for Rd
d = 1: Rd-code encoded L0..L15 for Rd
n: bit 8 // bit 3..0 encode n = 0..31, see Table 2.3 Encoding of Immediate Values
Notation:
ANDNI Rd, imm
Description:
The result of a bitwise logical AND not (ANDN) of the source operand (Rs) and the
immediate operand (Rd) is placed in the destination register (Rd) and the Z flag is set or
cleared accordingly. The immediate operand is used inverted (itself remaining unchanged).
Operation:
Rd := Rd and not imm;
Z := Rd = 0;
Exceptions:
None.