GMS30C2216 Datasheet, PDF (130/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

6-14
CHAPTER 6
Bits Name
Description
22..20 Mem1Access
Access time for address space MEM1
111 = 8 clock cycles
110 = 7 clock cycles
101 = 6 clock cycles
100 = 5 clock cycles
011 = 4 clock cycles
010 = 3 clock cycles
001 = 2 clock cycles
000 = 1 clock cycle
MEM0 = Non-DRAM (MCR(21) = 1):
19..16 Mem1Access
Access time for address space MEM0
1111 = 16 clock cycles
1110 = 15 clock cycles
1101 = 14 clock cycles
1100 = 13 clock cycles
1011 = 12 clock cycles
1010 = 11 clock cycles
1001 = 10 clock cycles
1000 = 9 clock cycles
0111 = 8 clock cycles
0110 = 7 clock cycles
0101 = 6 clock cycles
0100 = 5 clock cycles
0011 = 4 clock cycles
0010 = 3 clock cycles
0001 = 2 clock cycles
0000 = 1 clock cycle
14
Mem0Setup
Address setup time for address space MEM0
11 = 3 clock cycles
10 = 2 clock cycles
01 = 1 clock cycle
00 = 0 clock cycles
13..11 Mem0Hold
Address setup time for address apace MEM0
111 = 7 clock cycles
110 = 6 clock cycles
101 = 5 clock cycles
100 = 4 clock cycles
011 = 3 clock cycles
010 = 2 clock cycles
001 = 1 clock cycles
000 = 0 clock cycles
MEM0 = Non-DRAM (MCR(21) = 0):
19..18 RasPrecharge
RAS precharge time for address space MEM0
when MCR(8)=0
when MCR(8)=1
11 = 4 clock cycles
6 clock cycles
10 = 3 clock cycles
5 clock cycles
01 = 2 clock cycles
4 clock cycles
00 = 1 clock cycle
3 clock cycles