GMS30C2216 Datasheet, PDF (179/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

Appendix A. Instruction Set Details
AND
A-7
AND
Format:
RR format
15
OP-code
0101 01
10 9
d
87
s
Rd-code
43
0
Rs-code
s = 0: Rs-code encoded G0..G15 for Rs
s = 1: Rs-code encoded L0..L15 for Rs
d = 0: Rd-code encoded G0..G15 for Rd
d = 1: Rd-code encoded L0..L15 for Rd
Notation:
AND Rd, Rs
Description:
The result of a bitwise logical AND of the source operand (Rs) and the destination operand
(Rd) is placed in the destination register (Rd) and the Z flag is set or cleared accordingly.
Operation:
Rd := Rd and Rs;
Z := Rd = 0;
Exceptions:
None.