GMS30C2216 Datasheet, PDF (152/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

6-36
CHAPTER 6
6.10.3 MEM2 Read Access with WAIT Pin
MEM2 Byte Mode = 1, INT3Polarity = Inverted,
address setup time = 0 cycles, bus hold time = 0 cycles
CLK
Chip Select
Address Bus
WE0#..WE3#
WAIT
OE#
Data Bus
Access time
(minimum 4 cycle)
Next access
or bus hold
time if specified
Figure 6.10: MEM2 Read Access with WAIT Pin
Note:
• Arrows on WAIT signal indicate the times where the signal is inspected.
• In this example
specified access time: 4 cycles
actual access time: 6 = 4 cycles + 2 additional cycles caused by WAIT pin