GMS30C2216 Datasheet, PDF (101/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

Instruction Set
3-39
3.32 Extended DSP Instructions
The extended DSP functions use the on-chip multiply-accumulate unit. Single word results
always use register G15 as destination register, while double-word results are always
placed in G14 and G15. The condition flags remain unchanged.
Format Notation
Operation
LLext EMUL Ld, Ls
G15 := Ld * Ls;
-- signed or unsigned multiplication, single word product
LLext EMULU Ld, Ls
G14//G15 := Ld * Ls;
-- unsigned multiplication, double word product
LLext EMULS Ld, Ls
G14//G15 := Ld * Ls;
-- signed multiplication, double word product
LLext EMAC Ld, Ls
G15 := G15 + Ld * Ls;
-- signed multiply/add, single word product sum
LLext EMACD Ld, Ls
G14//G15 := G14//G15 + Ld * Ls;
-- signed multiply/add, double word product sum
LLext EMSUB Ld, Ls
G15 := G15 - Ld * Ls;
-- signed multiply/subtract, single word product difference
LLext EMSUBD Ld, Ls
G14//G15 := G14//G15 - Ld * Ls;
-- signed multiply/subtract, double word product difference
LLext EHMAC Ld, Ls
G15 := G15 + Ld(31..16) * Ls(31..16) + Ld(15..0) * Ls(15..0);
-- signed half-word multiply/add, single word product sum
LLext EHMACD Ld, Ls
G14//G15 := G14//G15 + Ld(31..16) * Ls(31..16) +
Ld(15..0) * Ls(15..0);
-- signed half-word multiply/add, double word product sum
LLext EHCMULD Ld, Ls
G14 := Ld(31..16) * Ls(31..16) - Ld(15..0) * Ls(15..0);
G15 := Ld(31..16) * Ls(15..0) + Ld(15..0) * Ls(31..16);
-- half-word complex multiply
LLext EHCMACD Ld, Ls
G14 := G14 + Ld(31..16) * Ls(31..16) - Ld(15..0) * Ls(15..0);
G15 := G15 + Ld(31..16) * Ls(15..0) + Ld(15..0) * Ls(31..16);
-- half-word complex multiply/add
LLext EHCSUMD Ld, Ls
G14(31..16) := Ld(31..16) + G14;
G14(15..0) := Ld(15..0) + G15;
G15(31..16) := Ld(31..16) - G14;
G15(15..0) := Ld(15..0) - G15;
-- half-word (complex) add/subtract
-- Ls is not used and should denote the same register as Ld
LLext EHCFFTD Ld, Ls
G14(31..16) := Ld(31..16) + (G14 >> 15);
G14(15..0) := Ld(15..0) + (G15 >> 15);
G15(31..16) := Ld(31..16) - (G14 >> 15);
G15(15..0) := Ld(15..0) - (G15 >> 15);
-- half-word (complex) add/subtract with fixed-point
adjustment
-- Ls is not used and should denote the same register as Ld