GMS30C2216 Datasheet, PDF (311/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

Appendix A. Instruction Set Details
Signed Subtract with Trap
A-139
SUBS
Format:
RR format
15
OP-code
0100 11
9 87
43
0
ds
Rd-code
Rs-code
s = 0: Rs-code encodes G0..G15 for Rs
s = 1: Rs-code encodes L0..L15 for Rs
d = 0: Rd-code encodes G0..G15 for Rd
d = 1: Rd-code encodes L0..L15 for Rd
Notation:
SUBS Rd, Rs
SUBS Rd, C
(When SR is denoted as a source operand)
Description:
The source operand is subtracted form the destination operand, the result is placed in the
destination register and the condition flags are set or cleared accordingly.
Both operands and the result are interpreted as all signed integers and a trap to Range Error
occurs at overflow.
When the SR is denoted as a source operand, C is subtracted instead of the SR.
Operation:
When Rs does not denote SR
Rd := Rd - Rs
Z := Rd = 0;
N := Rd(31);
V := overflow;
If overflow then
trap => Range Error
When Rs denotes SR
Rd := Rd - Rs;
Z := Rd = 0;
N := Rd(31);
V := overflow;
If overflow then
trap => Range Error
Exceptions:
Overflow (Trap to Range Error).