GMS30C2216 Datasheet, PDF (211/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

Appendix A. Instruction Set Details
Halfword complex multiply/add
A-39
EHCMACD
Format:
LLext format
15
87
43
0
OP-code
1100 1110
Ld-code
Ls-code
OP-code extention
0000 0000 0100 1110 (0x004E)
Ls-code encoded L0..L15 for Ls
Ld-code encoded L0..L15 for Ld
Notation:
EHCMACD Ld, Ls
Description:
The extended DSP instruction uses on-chip multiply-accumulate unit. An Extended DSP
instruction is issued in one cycle; the processor starts execution of the next instruction
before the Extended DSP instruction is finished.
Double-word results are always placed in G14 and G15. The condition flags remain
unchanged
This instruction can cause a n Extended Overflow exception when the Extended Overflow
Exception flag is enabled (FCR(16) = 0). Note that this overflow occurs asynchronously to
the execution of the Extended DSP instruction and any succeeding instructions.
Operation:
G14 := G14 + Ld(31..16) * Ls(31..16) -
Ld(15..0) * Ls(15..0);
G15 := G15 + Ld(31..16) * Ls(31..16) +
Ld(15..0) * Ls(15..0);
Exceptions:
Extended Overflow Exception