GMS30C2216 Datasheet, PDF (218/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

A-46
Appendix A. Instruction Set Details
Signed multiply/subtract, single word product difference EMSUB
Format:
LLext format
15
87
43
0
OP-code
1100 1110
Ld-code
Ls-code
OP-code extention
0000 0001 0001 1010 (0x011A)
Ls-code encoded L0..L15 for Ls
Ld-code encoded L0..L15 for Ld
Notation:
EMSUB Ld, Ls
Description:
The extended DSP instruction uses on-chip multiply-accumulate unit. An Extended DSP
instruction is issued in one cycle; the processor starts execution of the next instruction
before the Extended DSP instruction is finished.
Single-word results always use register G15 as destination register. The condition flags
remain unchanged
This instruction can cause a n Extended Overflow exception when the Extended Overflow
Exception flag is enabled (FCR(16) = 0). Note that this overflow occurs asynchronously to
the execution of the Extended DSP instruction and any succeeding instructions.
Operation:
G15 = G15 - Ld * Ls
Exceptions:
Extended Overflow Exception