GMS30C2216 Datasheet, PDF (102/320 Pages) Hynix Semiconductor – 16/32 BIT RISC/DSP

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CHAPTER 3
The instructions EMAC through EHCFFTD can cause an Extended Overflow exception
when the Extended Overflow Exception flag is enabled (FCR(16) = 0). Note that this
overflow occurs asynchronously to the execution of the Extended DSP instruction and any
succeeding instructions.
Attention: A new Extended DSP instruction can be started before the Extended Overflow
exception trap is executed!
An Extended DSP instruction is issued in one cycle; the processor starts execution of the
next instructions before the Extended DSP instruction is finished. The execution of
succeeding non-Extended-DSP instructions is only stopped and wait cycles are inserted
when an instruction addresses G15 or G14//G15 respectively before a preceding Extended
DSP instruction placed its result into G15 or G14//G15. Thus, DSP programs can place
Load/Store or loop administration instructions into the slot cycles between issue of an
Extended DSP instruction and availability of its result. See also section 2.5. Instruction
Timing.
Register
L0 : $12344321
L1 : $56788765
G14 : $11112222
G15 : $33334444
Instruction
EMUL L0, L1
EMULU L0, L1
EMAC L0, L1
EHCMULD L0, L1
EHCFFTD L0, L1
; G15 = L0 * L1 = $4B7CE305
; G14//G15 = L0 * L1
; G14 = $062620AD, G15 = $4B7CE305
; G15 = G15 + L0 * L1 = $7EB02749
; G14 = $25C61D5B
; = L0(31..16)*L1(31..16) - L0(15..0)*L1(15..0)
; G15 = $0E1927FC
; = L0(31..16)*L1(15..0) + L0(15..0)*L1(31..16)
; G14(31..16) = $3456 = L0(31..16) + (G14>>15)
; = $06260060
; G14(15..0) = $A987 = L0(15..0) + (G15>>15)
; = $06260060
; G15(31..16) = $F012 = L0(31..16) - (G14>>15)
; = $06260060
; G15(151..0) = $DCBB = L0(15..0) - (G15>>15)
; = $06260060