HMS30C7110 Datasheet, PDF (94/161 Pages) List of Unclassifed Manufacturers – Multipurpose Network Processor

buffer of high priority TX queue.
HMS30C7110
Table 2.52 TX High Priority Queue Level
Bits Access Default Description
31:21
0
Reserved
20:16 RO 0
TX address-back buffer level
15:12
0
Reserved
12:8 RO 0
TX address buffer level
7:5
0
Reserved
4:0 RO 0
TX length buffer level
MAC0 Address : 1920_00B0
MAC1 Address : 1920_10B0
2.6.2.31. TX_ADDR_BK_H (offset = 0xB4)
This register holds up to 15 TX addresses of high priority used in transmission.
Table 2.53 TX High Priority Queue Address Return
Bits Access Default Description
31:0 RO 0
TX address back
MAC0 Address : 1920_00B4
MAC1 Address : 1920_10B4
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