HMS30C7110 Datasheet, PDF (158/161 Pages) List of Unclassifed Manufacturers – Multipurpose Network Processor

HMS30C7110
Table 3.4 A.C. Electrical Characteristics
Parameter
t_SCLK
t_SCLKH
t_SCLKL
t_SCLKF
t_SCLKR
t_MDCLK
t_MDCLKH
t_MDCLKL
t_MDCLKF
t_MDCLKR
t_CCLK
t_CCLKH
t_CCLKL
t_CCLKF
t_CCLKR
t_SDAD
t_SDRD
t_SDCD
t_SDWD
t_SDDD
t_SDDS
t_SDDH
t_MS100
t_MH100
t_MD100
t_MS10
t_MH10
t_MD10
t_RS100
(TA = 0°C to 70°C, VDD = 3.0V to 3.3V, Unit = ns)
Description
Min Typ Max
Clock period for SCLK
-
-
-
Clock high time for SCLK
-
-
-
Clock low time for SCLK
-
-
-
Clock falling time for SCLK
-
-
-
Clock rising time for SCLK
-
-
-
Clock period for MDC
-
-
-
Clock high time for MDC
-
-
-
Clock low time for MDC
-
-
-
Clock falling time for MDC
-
-
-
Clock rising time for MDC
-
-
-
Clock period for CCLK
-
-
-
Clock high time for CCLK
-
-
-
Clock low time for CCLK
-
-
-
Clock falling time for CCLK
-
-
-
Clock rising time for CCLK
-
-
-
SDRAM address output delay
-
-
-
SDRAM RAS output delay
-
-
-
SDRAM CAS output delay
-
-
-
SDRAM WE output delay
-
-
-
SDRAM DATA output delay
-
-
-
SDRAM DATA setup time
-
-
-
SDRAM DATA hold time
-
-
-
MII setup time for 100Mbps
-
-
-
MII hold time for 100Mbps
-
-
-
MII output delay for 100Mbps
-
-
-
MII setup time for 10Mbps
-
-
-
MII hold time for 10Mbps
-
-
-
MII output delay for 10Mbps
-
-
-
RMII setup time
-
-
-
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