HMS30C7110 Datasheet, PDF (88/161 Pages) List of Unclassifed Manufacturers – Multipurpose Network Processor

HMS30C7110
15:8 RW
7:0 RW
0x2e
0x10
Frames with payload of more than this value will be truncated.
Minimum payload length, default = 46 in decimal
Maximum burst transfer length in word on the system bus.
default = 16 in decimal
2.6.2.18. MCAST_ADDR_0 (offset = 0x48)
This register combined with MCAST_ADDR_1 (offset = 0x4C) provides 64-bit field to qualify
multicast frame destined to this Ethernet MAC. Only one bit out of 64-bits should be set to
determine valid multicast address. The bit position to be set is calculated by applying CRC over
destination address field of incoming multicast frame.
Table 2.40 Multicast Address (Most Significant)
Bits Access Default
31:0 RW 0
MAC0 Address : 1920_0048
MAC1 Address : 1920_1048
Description
Only one bit position should be set to determine that the current
multicast frame is destined to this MAC
2.6.2.19. MCAST_ADDR_1 (offset = 0x4c)
Table 2.41 Multicast Address (Least Significant)
Bits Access Default
31:0 RW 0
MAC0 Address : 1920_004C
MAC1 Address : 1920_104C
Description
See Multicast Address 0 (offset = 0x48)
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