HMS30C7110 Datasheet, PDF (80/161 Pages) List of Unclassifed Manufacturers – Multipurpose Network Processor

HMS30C7110
2.6.2.5. COLL_CFG (offset = 0x10)
This register defines collision related parameters.
Table 2.27 Collision Configuration Definition
MAC0 Address : 1920_0010
MAC1 Address : 1920_1010
Bits Access Default Description
31:16 RW 0x000F Maximum Retry
This field specifies the maximum number of consequential
retransmission attempts after the collision is detected. When the
maximum number is reached the MAC reports an error and tops
transmitting the current packet. According to the Ethernet standard, the
Maximum Retry default value is set to 0xF (15 in decimal)
15:8 RW 0x20 Write Allowance
Define the margin in system fifo to prevent overflow.
7:0 RW 0x10 Collision Window
Define the number of data from the start of transmission until collision is
detected. If collision is detected before the number of data is reached this
value, it will be considered as retry able collision.
2.6.2.6. TX_BADDR (offset = 0x14)
The start address of outgoing frame is written in this register. Writing to TX_BADDR and
TX_LENGTH will initiate transmission process.
Table 2.28 Transmit Buffer Address
MAC0 Address : 1920_0014
MAC1 Address : 1920_1014
© 2003 MagnaChip Semiconductor Ltd. All Rights Reserved
80
Version 1.5