HMS30C7110 Datasheet, PDF (133/161 Pages) List of Unclassifed Manufacturers – Multipurpose Network Processor

24
Reserved
16
Reserved
8
Reserved
HMS30C7110
0 INT_EXT0
2.12.1.2. MODE REGISTER (INTMOD, offset = 0x04)
This register is composed of 32 bits each of which is related to an interrupt source. If a specific bit
is set to 1, the corresponding interrupt is processed as the NMI request. Otherwise, it is processed as
a normal IRQ.
Note that at most only one interrupt source can be serviced in the NMI mode. (You should use the
NMI mode only for the urgent interrupt.) Thus, only one bit of INTMOD can be set to 1 at most.
This register is write-only one, thus it cannot be read out.
Register Address
INTMOD 0x04
Table 2.98 Interrupt Mode Register
R/W Description
W 0 = IRQ mode, 1 = NMI mode
Address : 1930_0004
Reset value
0x00000000
Each field and the corresponding bit position are the same as those of SRCPND register.
2.12.1.3. INTERRUPT MASK REGISTER (INTMSK, offset = 0x08)
Each of the 32 bits in the interrupt mask register is related to an interrupt source. If you set a
specific bit to 1, the interrupt request from corresponding interrupt source is not serviced by CPU.
(Note that even in such a case, the corresponding bit of SRCPND register is set to 1). If the mask bit
is 0, the interrupt request can be serviced.
Register Address
INTMSK 0x08
Table 2.99 Interrupt Mask Register
R/W Description
R/W 0 = Interrupt service is available
Address : 1930_0008
Reset value
0xffffffff
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