HMS30C7110 Datasheet, PDF (32/161 Pages) List of Unclassifed Manufacturers – Multipurpose Network Processor

HMS30C7110
2.1. System Configuration
This section describes system memory map and power-up configuration of HMS30C7110®.
2.1.1. Power-up Configuration
The following table shows power-up configuration mapping based on mode configuration pins
(MODE, TESTSE).
MODE
0
0
1
1
Table 2.1 Power-up Configuration
TESTSE
0
1
0
1
Normal Operation
NANDTREE/BIST/PLL Test
Parallel Capture for ATPG
Scan Shift for ATPG
Contents
2.1.2. System Memory Map
The system memory map can be one of the following two configurations:
1. Memory Maps
A. SDRAM_REMAP = 0
B. SDRAM_REMAP = 1
Two different memory maps can be selected by one of MEMC (SDRAM) registers. Refer to MEMC
for details.
Note 1: This address range is repeated in 0x4000_0000 ~ 0x7FFF_FFFF, 0x8000_0000 ~
0xBFFF_FFFF, and 0xC000_0000 ~ 0xFFFF_FFFF.
Note 2: 0x0000_0000 ~ 0x7FFF_FFFF is cacheable area and 0x8000_0000 ~ 0xFFFF_FFFF is non-
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