HMS30C7110 Datasheet, PDF (93/161 Pages) List of Unclassifed Manufacturers – Multipurpose Network Processor

HMS30C7110
2.6.2.28. TX_BUF_LVL_L (offset = 0xA8)
This register displays buffer levels of TX address buffer, TX length buffer, and TX address-back
buffer of low priority TX queue.
Table 2.50 TX Low Priority Queue Level
Bits Access Default Description
31:21
0
Reserved
20:16 RO 0
TX address-back buffer level
15:12
0
Reserved
12:8 RO 0
TX address buffer level
7:5
0
Reserved
4:0 RO 0
TX length buffer level
MAC0 Address : 1920_00A8
MAC1 Address : 1920_10A8
2.6.2.29. TX_ADDR_BK_L (offset = 0xAC)
This register holds up to 15 TX addresses of low priority used in transmission.
Table 2.51 TX Low Priority Queue Address Return
Bits Access Default Description
31:0 RO 0
TX address back
MAC0 Address : 1920_00AC
MAC1 Address : 1920_10AC
2.6.2.30. TX_BUF_LVL_H (offset = 0xB0)
This register displays buffer levels of TX address buffer, TX length buffer, and TX address-back
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