HMS30C7110 Datasheet, PDF (39/161 Pages) List of Unclassifed Manufacturers – Multipurpose Network Processor

HMS30C7110
Enet
Mac 1
Controller
Interrupt
Controller
PCMCIA
Controller
_008c MAC address 7 (Lower 4 bytes)
R/W
_0090 Pause frame address (Higher 2 bytes)
R/W
_0094 Pause frame address (Lower 4 bytes)
R/W
_0098 Pause frame Type / Op. code
R/W
_009c Pause frame delay value
R/W
_00a0 Transmit buffer base address (High priority) R/W
_00a4 Transmit buffer length (High priority)
R/W
_00a8 TX queue buffer level (Low)
R
_00ac TX address return (Low)
R
_00b0 TX queue buffer level (High)
R
_00b4 TX address return (High)
R
000b8 – 00ffc RESERVED
1920_1000
...
_10c8
Same Configuration as
Enet Mac 0 Controller
010cc – ffffc RESERVED
1930_0000 Source Pending Register
R/W
_0004 Interrupt Mode Register
W
_0008 _{Interrupt Enable Mask Register}
R/W
_000c Interrupt Priority Control Register
W
_0010 Interrupt Pending Register
R/W
_0014 Interrupt Offset Register
R
00018 – ffffc RESERVED
1940_0000 Identification Register
R
_0004 Interface Status Register (VS_in)
R
_0008 Interface Control Register (VS_out)
R/W
_000c General Control Register
R/W
_0010 Card Status Change Register
R
_0014 Card Status Change Enable Register
R/W
_0018 Setup Timing 0 Register for Bank 0
R/W
_001c Command Timing 0 Register for Bank 0
R/W
_0020 Recovery Timing 0 Register for Bank 0
R/W
_0024 Setup Timing 1 Register for Bank 1
R/W
_0028 Command Timing 1 Register for Bank 1
R/W
_002c Recovery Timing 1 Register for Bank 1
R/W
0000_0000
0000_0180
c200_0001
8808_0001
0000_0018
0000_0000
0000_0000
0000_0000
0000_0000
0000_0000
0000_0000
0000_0000
0000_0000
0000_0000
0000_0000
ffff_ffff
0000_003f
0000_0000
0000_0020
Prev_Read_value
0000_0082
0000_0000
0000_0000
0000_0001
0000_0000
0000_000f
0000_000f
0000_000f
0000_000f
0000_000f
0000_000f
© 2003 MagnaChip Semiconductor Ltd. All Rights Reserved
39
Version 1.5