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HMS30C7110 Datasheet, PDF (126/161 Pages) List of Unclassifed Manufacturers – Multipurpose Network Processor
RSVD
STATUS
CTC
[30:22] Reserved
[21:20] DMA Status.
0: Ready(or Idle), 1: Busy, 2: Error
[19:0] Current transfer count (or transfer beat).
HMS30C7110
2.11.1.5. DMA CURRENT SOURCE REGISTER (DCSRC, offset = 0x10, 0x30)
This register shows the value of current source address of the transfer. So only least 30 bits are valid.
DMA0 Address : 1910_0010
DMA1 Address : 1910_0030
Field Name Bit
Description
[29:00] Current Source Address
2.11.1.6. CURRENT DESTINATION REGISTER (DCDST, offset = 0x14, 0x34)
This register shows the value of current destination address of the transfer.
DMA0 Address : 1910_0014
DMA1 Address : 1910_0034
Field Name Bit
Description
[29:00] Current Destination Address
2.11.1.7. DMA MASK TRIGGER REGISTER (MASKTRIG, offset = 0x18, 0x38)
Field Name Bit
Table 2.95 DMA Mask Trigger Register
Description
DMA0 Address : 1910_0018
DMA1 Address : 1910_0038
© 2003 MagnaChip Semiconductor Ltd. All Rights Reserved
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Version 1.5