HMS30C7110 Datasheet, PDF (63/161 Pages) List of Unclassifed Manufacturers – Multipurpose Network Processor

HMS30C7110
complete, hardware clears this bit, so it may be polled by software to
determine when the SDRAM(s) is (are) available for use.
2.5.2.5. Address Map Control
This register includes data bus width selection/memory re-map bits.
Table 2.20 Address Control register
Address : 1908_001C
Bits Access Default Description
31:2
Reserved.
1
RW 0
32/16Bit Data bus width selection
0 = 32 bit
1 = 16 bit
0
RW 0
SDRAM_REMAP
0 = Address 0x0000_0000 is located at Flash memory area
(SDRAM will be 0x1000_0000)
1 = Address 0x0000_0000 is located at SDRAM area
2.5.3. Timing Diagram
2.5.3.1. Read/Write Access
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