HMS30C7110 Datasheet, PDF (53/161 Pages) List of Unclassifed Manufacturers – Multipurpose Network Processor

HMS30C7110
SYSTEM BUS
CONFIGRUATION
REGISTERS
MAIN CONTROL
LOGIC
ADDRESS CONTROL
ADDR
SIGNALS
GENERATOR
nRCS0-2
nOE
nWE
DATA PATH
DATA
nCS0,1
nIORD
nIOWR
PCMCIA CONTROL
READY/nIRQ
INT
nREG/DACK
nSTSCHG
IOIS16/nDREQ
Figure 2.2 Block Diagram of External controller
2.4.2. User Accessible Registers (Base = 0x1900_0000)
This section describes the bit assignment of the configuration registers of the ROM controller. The
address field indicates a relative address in hexadecimal. Width specifies the number of bits in the
register and access specifies the valid access types of the register. Where RW stands for read access
and write access, ‘RO’ for read only access. A ‘C’ appended to ‘RW’ or ‘RO’, indicates that some or
all of the bits can be cleared after writing ‘1’ in corresponding bit.
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