HMS30C7110 Datasheet, PDF (122/161 Pages) List of Unclassifed Manufacturers – Multipurpose Network Processor

HMS30C7110
Table 2.89 Interrupt Mask Register Bit Definition
Bits Access Default Description
31:1
0
Reserved
0
RW 0
TX done enable
Address : 1840_0024
2.10.2.7. STATUS
This register includes SPI Rx Status bits.
Table 2.90 SPI Status Register Bit Definition
Bits Access Default Description
31: 1
0
Reserved
0
R
0
TX empty
Address : 1840_0028
© 2003 MagnaChip Semiconductor Ltd. All Rights Reserved
122
Version 1.5