HMS30C7110 Datasheet, PDF (71/161 Pages) List of Unclassifed Manufacturers – Multipurpose Network Processor

HMS30C7110
that some or all of the bits are auto cleared. Base address of Ethernet MAC 1 is 0x1920_1000.
Table 2.22 Registers for Ethernet MAC
Name
Address Width
MAC_MODE
0x00 32
INT_SRC
0x04 32
INT_ENABLE
0x08 32
IF_GAP
0x0C 32
COLL_CFG
0x10 32
TX_BADDR
0x14 32
TX_LENGTH
0x18 32
RX_BADDR
0x1C 32
RX_BSTAT
0x20 32
RX_BUFLVL
0x24 32
RX_ADDR_BACK 0x28 32
CTRL_MODE
0x2C 32
MII_MODE
0x30 32
MII_CMD
0x34 32
MII_TXDATA
0x38 32
MII_RXDATA
0x3C 32
RESERVED
0x40 32
LENGTH
0x44 32
MCAST_ADDR_0 0x48 32
MCAST_ADDR_1 0x4C 32
MAC_ADDR_00 0x50 32
MAC_ADDR_01 0x54 32
MAC_ADDR_10 0x58 32
MAC_ADDR_11 0x5C 32
MAC_ADDR_20 0x60 32
MAC_ADDR_21 0x64 32
MAC_ADDR_30 0x68 32
Access
RW
RW
RW
RW
RW
RW
RW
RW
RO
RO
RO
RWC
RW
RWC
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Description
MAC mode register
Interrupt source register
Interrupt enable register
Inter-frame gap register
Collision control register
Transmit buffer base address
Transmit buffer length
Receive buffer base address
Receive buffer status
Address/Status buffer level
Receive buffer base address return
Control mode register
MII mode register
MII command register
MII transmit data
MII receive data
Reserved
Max, Min, burst length register
Multicast Address (Most significant)
Multicast Address (Least significant)
MAC address 0 (Most significant 2 bytes)
MAC address 0 (Least significant 4 bytes)
MAC address 1 (Most significant 2 bytes)
MAC address 1 (Least significant 4 bytes)
MAC address 2 (Most significant 2 bytes)
MAC address 2 (Least significant 4 bytes)
MAC address 3 (Most significant 2 bytes)
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