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HMS30C7110 Datasheet, PDF (139/161 Pages) List of Unclassifed Manufacturers – Multipurpose Network Processor
31:8
7: 0 RO
0x00
0x00
Reserved.
ID number
This 8bit field “0x82”.
HMS30C7110
2.13.1.2. Interface Status Register (ISR)
Table 2.106 ISR Bit Definition
Address : 1940_0004
Bits Access Default Description
31:8
0x00 Reserved.
7
RO 0
VS2
This bit reflects the state of the VS2 pin of the PCMCIA.
6
RO 0
VS1
This bit reflects the state of the VS1 pin of the PCMCIA.
5
RO 0
Ready/Busy Signal Status
This bit reflects the state of the READY pin of the PCMCIA.
4
RO 0
Memory Write Protect Signal Status
This bit reflects the state of the WP pin of the PCMCIA.
3
RO 0
Card Detect 2 Signal Status
This bit reflects the state of the CD2 pin of the PCMCIA.
2
RO 0
Card Detect 1 Signal Status
This bit reflects the state of the CD1 pin of the PCMCIA.
1
0
Reserved
0
RO 0
Status Change Signal Status
This bit reflects the state of the STSCHG pin of the PCMCIA.
2.13.1.3. Interface Control Register (ICR)
Table 2.107 ICR Bit Definition
© 2003 MagnaChip Semiconductor Ltd. All Rights Reserved
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Version 1.5