HMS30C7110 Datasheet, PDF (100/161 Pages) List of Unclassifed Manufacturers – Multipurpose Network Processor

HMS30C7110
0
RO 0x0
This bit can be used in a prioritized interrupt environment to indicate
whether an interrupt is pending. When bit 0 is logic 0, an interrupt is
pending and the IIR contents may be used as a pointer to the
appropriate interrupt service routine. When bit 0 is logic 1, no
interrupt is pending.
Table 2.59 Interrupt Control Functions
FIFO
Interrupt
Mode
Identification
Only
Register
Bit 3 Bit 2 Bit 1 Bit 0 Priority Interrupt
Level Type
0
0
0
1
-
None
0
1
1
0
Highest Receiver
Line Status
0
1
0
0
Second Received
Data
Available
1
1
0
0
Second Character
Timeout
Indication
0
0
1
0
Third Transmitter
Holding
Register
Empty
0
0
0
0
Fourth MODEM
Status
Interrupt Set and Reset Functions
Interrupt Source
Interrupt Reset Control
None
-
Overrun Error or Parity Error or Framing Reading the Line Status
Error or Break Interrupt
Register
Receiver Data Available or Trigger Level Reading the Receiver Buffer
Reached
Register or the FIFO Drops
below the Trigger Level
No Characters Have Been Removed from Reading the Receiver Buffer
or Input to the RCVR FIFO During the Register
Last 4 Char. Times and There is at Least
1 Char. In it During This Time
Transmitter Holding Register Empty
Reading the IIR Register (if
Source of Interrupt) or
Writing into the Transmitter
Holding Register
Clear To Send or Data Set Ready or Ring Reading the MODEM Status
Indicator or Data Carrier Detect
Register
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100
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