HMS30C7110 Datasheet, PDF (113/161 Pages) List of Unclassifed Manufacturers – Multipurpose Network Processor

2.9. GPIO
HMS30C7110
The HMS30C7110® integrates a GPIO module that supports 21 GPIO (General Purpose Input /
Output) ports. 3 GPIO out of 21 are dedicated to GPIO feature and others are muxed to other
features. Each port is configurable with input or output mode. The initial modes of all GPIO pins
are set to input, so when to use in output mode, it is highly recommended to pull-up or pull-down
the ports to prevent annoying vibration caused by temporary high impedance state during reset and
initialization.
The GPIO is capable of interrupting the MCU when input signal triggers, and it supports one of the
four kinds of interrupt source signal. Level trigger high/low and edge trigger rising/falling signal.
The GPIO is fully configurable through a set of control registers. Complete descriptions of these
registers are given in the Register Section.
2.9.1. User Accessible Registers (Base = 0x1820_0000)
This section describes all base, control and status registers inside the GPIO module. The address
field indicates a relative address in hexadecimal. Width specifies the number of bits in the register
and access specifies the valid access types to that register. ‘RW’ stands for read and write access and
‘RO’ for read only access. A ‘C’ appended to ‘RW’ or ‘RO’ indicates some or all of the bits can be
cleared after writing ‘1’ to the corresponding bit.
Name
GPO Data
GPI Data
GPIO Direction
INT SRC
INT ENABLE
INT MODE
Table 2.75 Registers for GPIO
Address Width
0x00 9
0x04 12
0x08 9
0x0c 16
0x10 16
0x14 16
Access
RW
RO
RW
RW
RW
RW
Description
GPO data to I/O pins
GPI data from I/O pins
Direction for I/O pins
Interrupt Source
Interrupt enable
Detection mode of interrupt
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