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HMS30C7110 Datasheet, PDF (117/161 Pages) List of Unclassifed Manufacturers – Multipurpose Network Processor
HMS30C7110
31:16
15: 0 RW
0x00
0x00
Reserved
INT LEVEL
This 16-bits field controls the active level of interrupt request on each
GPI pins.
0 = Low active for Level / Falling edge for Edge trigger
1 = High active for Level / Rising edge for Edge trigger
2.10. SPI
The HMS30C7110® integrates an Serial Peripheral Interface (SPI) module which is used for
interfacing the Serial ROM or Serial Interface Devices such as PCM Audio codec.
The SPI of HMS30C7110® generates serial clock (CCLK), serial data out (CDOUT), serial data in
(CDIN) and chip select (nCCS). The clock speed is selectable by programming the internal register.
The SPI also supports the 8bit, 16bit and 32bit IO devices. The complete descriptions of these
registers are given in the Register Section.
2.10.1. Block Diagram
The SPI of HMS30C7110® consists of several blocks such as register file and serial interface core
module.
© 2003 MagnaChip Semiconductor Ltd. All Rights Reserved
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Version 1.5