SMJ320C80 Datasheet, PDF (65/157 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSOR

SMJ320C80
DIGITAL SIGNAL PROCESSOR
SGUS025B – AUGUST 1998 – REVISED JUNE 2002
PT maximum (PTMAX) register (0x01820008)
The PTMAX register determines the maximum number of cycles after PTMIN has elapsed that a packet transfer
executes before timing out.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PTMAX
Figure 49. PTMAX Register
fault status (FLTSTS) register (0x0182000C)
The FLTSTS register indicates the cause of a memory access fault. Fault status bits are cleared by writing a
1 to the appropriate bit.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PPPP
CCCC
PPPP
PPPP
XPT
M
PP # 3 2 1 0
PC PPx Cache / DEA Fault
PP PPx Packet-Transfer Fault
PP# 3 2 1 0
XPT Faulting XPT
M MP Packet-Transfer Fault
Figure 50. FLTSTS Register
packet-transfer parameters
The most efficient method for data movement in a SMJ320C80 system is through the use of packet transfers
(PTs). Packet transfers allow the TC to move blocks of data autonomously between a specified src and dst
memory region. Requests for the TC to execute a packet transfer may be made by the MP, PPs, or external
devices. A packet-transfer parameter table describing the data packet and how it is to be transferred must be
programmed in on-chip memory before the transfer is requested. The TC on the SMJ320C80 supports short-
and long-form packet transfers. The PT parameter table format is shown in Figure 51.
31
0
Next Entry Address
PT
PT Options
PT + 4
Src Start/Base Address
PT + 8
Dst Start/Base Address
PT + 12
Src B Count
Src A Count
PT + 16
Dst B Count
Dst A Count
PT + 20
Src C Count/# of Entries
PT + 24
Dst C Count/# of Entries
PT + 28
PT – 64-byte aligned on-chip starting address of
parameter table
31
Src B Pitch
Dst B Pitch
Src C Pitch/Guide Table Pointer
Dst C Pitch/Guide Table Pointer
Transparency/Color Word 0
Transparency/Color Word 1
Reserved
Reserved
† _{Words are swapped in big-endian mode}
Figure 51. Packet-Transfer Parameter Table
0
PT + 32
PT + 36
PT + 40
PT + 44
PT + 48^†
PT + 52^†
PT + 56
PT + 60
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