SMJ320C80 Datasheet, PDF (39/157 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSOR

SMJ320C80
DIGITAL SIGNAL PROCESSOR
SGUS025B – AUGUST 1998 – REVISED JUNE 2002
PP data-unit registers
The data unit contains eight 32-bit general-purpose data registers (d0–d7) referred to as the D registers. The
d0 register also acts as the control register for extended ALU (EALU) operations.
d0 register
Figure 24 shows the format when d0 is used as the EALU control register.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FMOD A
EALU Function Code
C I S N E F T – – DMS M R U
DBR
FMOD
A
C
I
S
N
Function modifiers
Arithmetic enable
EALU carry-In
Invert-carry-In
Sign extend
Nonmultiple mask
E
F
DMS
M
R
DBR
Explicit multiple carry-in
Expanded multiple flags
Default multiply shift amount
Split multiply
Rounded multiply
Default barrel rotate amount
Figure 24. d0 Format for EALU Operations
multiple flags (mf) register
The mf register records status information from each split ALU segment for multiple arithmetic operations. The
mf register can be expanded to generate a mask for the ALU. Figure 25 shows the mf register format.
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Figure 25. mf Register Format
status register (sr)
The sr contains status and control bits for the PP ALU. See Figure 26.
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N C V Z – – – – – – – – – – – – – – – – – – – MSS R Msize
Asize
N Negative status bit
C Carry status bit
V Overflow status bit
Z Zero status bit
R Rotation bit
MSS
Msize
Asize
mf status selection
00 – set by zero 10 – set by extended result
01 – set by sign 11 – reserved
Expander data size
Split ALU data size
Figure 26. sr Format
PP address-unit registers
address registers
The address unit contains ten 32-bit address registers which contain the base address for address
computations or which can be used for general-purpose data. The registers a0 – a4 are used for local-address
computations and registers a8–a12 are used for global-address computations.
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