SMJ320C80 Datasheet, PDF (145/157 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSOR

video interface timing: SCLK timing (see Figure 121)
NO
63 tc(SCK)
SCLK period
64 tw(SCKH)
Pulse duration, SCLK high
65 tw(SCKL)
Pulse duration, SCLK low
66 tt(SCK)
Transition time, SCLK (rise and fall)
* This parameter is not production tested.
SMJ320C80
DIGITAL SIGNAL PROCESSOR
SGUS025A – AUGUST 1998 – REVISED JUNE 2002
MIN MAX UNIT
13
ns
5
ns
5
ns
2* ns
63
64
SCLK0
SCLK1
66
66
65
Figure 121. Video Interface Timing: SCLK Timing
• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443
145