SMJ320C80 Datasheet, PDF (18/157 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSOR

SMJ320C80
DIGITAL SIGNAL PROCESSOR
SGUS025B – AUGUST 1998 – REVISED JUNE 2002
MP functional block diagram (continued)
Register File
(Thirty-One 32-Bit Registers)
Scoreboard
Barrel Rotator
Mask Generator
Zero Comparator
Integer Arithmetic and
Logic Unit (ALU)
Leftmost/Rightmost One
Timer
Double-Precision
Floating-Point Multiplier
(Single-Precision Core)
Double-Precision Floating-Point
Accumulators
Control Registers
Instruction Register
Program Counters (PCs)
PC Incrementer
Emulation Logic
Double-Precision
Floating-Point Adder
Endian Multiplexers
Instruction Cache
Controller
Data-Cache
Controller
Crossbar Interface
Figure 3. MP Block Diagram
MP general-purpose registers
The MP contains 31 32-bit general-purpose registers, R1–R31. Register R0 always reads as zero and writes
to it are discarded. Double-precision values are always stored in an even-odd register pair with the
higher-numbered register always holding the sign bit and exponent. The R0/R1 pair is not available for this use.
A scoreboard keeps track of which registers are awaiting loads or the result of a previous instruction and stalls
the instruction pipeline until the register contains valid data. As a recommended software convention, R1 is
typically used as a stack pointer and R31 as a return-address link register.
Figure 4 shows the MP general-purpose registers.
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