SMJ320C80 Datasheet, PDF (130/157 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSOR

SMJ320C80
DIGITAL SIGNAL PROCESSOR
SGUS025A – AUGUST 1998 – REVISED JUNE 2002
PARAMETER MEASUREMENT INFORMATION
Tester Pin
Electronics
VLOAD
IOL
50 Ω
CT
Output
Under
Test
IOH
Where:
IOL
=
IOH
=
VLOAD =
CT
=
2.0 mA (all outputs)
400 µA (all outputs)
1.5 V
60 pF typical load circuit capacitance
Figure 105. Test Load Circuit
signal transition levels
TTL-output levels are driven to a minimum logic-high level of 2.2 V and to a maximum logic-low level of
0.8 V. Figure 106 shows the TTL-level outputs.
2.2 V
1.75 V
1.0 V
0.8 V
Figure 106. TTL-Level Outputs
TTL-output transition times are specified as follows:
D For a high-to-low transition, the level at which the output is said to be no longer high is 1.75 V, and the level
at which the output is said to be low is 1.0 V.
D For a low-to-high transition, the level at which the output is said to be no longer low is 1.0 V, and the level
at which the output is said to be high is 1.75 V.
Figure 107 shows the TTL-level inputs.
2V
0.8 V
Figure 107. TTL-Level Inputs
TTL-compatible input transition times are specified as follows:
D For a high-to-low transition on an input signal, the level at which the input is said to be no longer high is
2 V, and the level at which the input is said to be low is 0.8 V.
D For a low-to-high transition on an input signal, the level at which the input is said to be no longer low is
0.8 V, and the level at which the input is said to be high is 2 V.
130
• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443