SMJ320C80 Datasheet, PDF (106/157 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSOR

SMJ320C80
DIGITAL SIGNAL PROCESSOR
SGUS025B – AUGUST 1998 – REVISED JUNE 2002
refresh cycles (continued)
State
r1
r2
r3
r4
r5
r6
r7
r8
r9
r1
CLKOUT
CT[2:0]
7
AS[2:0]
BS[1:0]
PS[3:0]
UTIME
FAULT
READY
RETRY
STATUS[5:0]
Cycle Type
PAC
RL
A[31:16]
Refresh Pseudo Address
A[15:0]
RAS
CAS/DQM[7:0]
DSF
TRG/CAS
W
D[63:0]
DBEN
DDIN
Figure 84. 3-Cycle/Column Refresh-Cycle Timing
106
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