SMJ320C80 Datasheet, PDF (129/157 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSOR

SMJ320C80
DIGITAL SIGNAL PROCESSOR
SGUS025A – AUGUST 1998 – REVISED JUNE 2002
absolute maximum ratings over specified temperature ranges (unless otherwise noted)^†
Supply voltage range, V_DD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 4 V
Input voltage range, V_I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 4 V
Output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 4 V
Case temperature, T_C (M-temperature) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
(A-temperature) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C
Storage temperature range, T_stg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 150°C
† _{Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and}
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to VSS.
recommended operating conditions
MIN NOM MAX UNIT
VDD
VSS
IOH
IOL
Supply voltage
Supply voltage (see Note 2)
High-level output current
Low-level output current
TC Case temperature
M-temperature
A-temperature
3.135
0
–55
–40
3.3 3.465 V
0
0V
–400 µA
2 mA
125
°C
85
NOTE 2: To minimize noise on VSS, care should be taken to provide a minimum inductance path between the VSS pins and system ground.
electrical characteristics over recommended range of supply voltage and specified temperature
(unless otherwise noted)
PARAMETER
TEST CONDITIONS^‡
MIN TYP^§ MAX
UNIT
VIH High-level input voltage
2
VDD + 0.3
V
VIL Low-level input voltage
–0.3
0.8
V
VOH High-level output voltage
VDD = MIN,
IOH = MAX
2.2
V
VOL Low-level output voltage
VDD = MAX
0.8
V
Output current, leakage (high impedance)
IO
(except EMU0 and EMU1)
VDD = MAX,
VDD = MAX,
VO = 2.8 V
VO = 0.6 V
20
µA
–20
II
Input current (except TCK, TDI, and TMS), TRST
VI = VSS to VDD
±20
µA
IDD Supply current (see Note 3)
VDD = MAX,
50 MHz
1^§
2.5
A
Ci
Input capacitance
10^§
pF
Co Output capacitance
10^§
pF
‡ _{For conditions shown as MIN/MAX, use the appropriate value specified under the recommended operating conditions.}
§ _{All typical values are at VDD = 3.3 V, TA = 25°C}
¶ _{Typical steady-state VOH will not exceed VDD}
NOTE 3: Maximum supply current is derived from a test case that generates the theoretical maximum data flow using a worst case checkerboard
data pattern on a sustained cycle by cycle basis. Actual maximum IDD varies in real applications based on internal and external data
flow and transitions. Typical supply current is derived from a test case which attempts to emulate typical use conditions of the on-chip
processors with random data. Typical IDD varies from application to application based on data flow and transitions and on-chip processor
utilization.
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