SMJ320C80 Datasheet, PDF (51/157 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSOR

PP instruction set (continued)
SMJ320C80
DIGITAL SIGNAL PROCESSOR
SGUS025B – AUGUST 1998 – REVISED JUNE 2002
Table 11. Summary of Parallel Transfers
Operation
Load
Description Transfer from memory into PP register
Syntax
dst = [sign] [size] [ [[cond]] ]* addrexp
dst = [sign] [size] [ [[cond]] ]* an.element
Examples
d3 = uh[n]* (a9++=[2])
d1 = * a2.sMY_ELEMENT
Operation
Store
Description Transfer from PP register into memory
Syntax
* addrexp = [size] src [ [[n]] src–1]
* an.element = [size] src [ [[n]] src–1]
Examples
*––a2 = d3
*a9.sMY_ELEMENT = a3
Operation
Address unit arithmetic
Description Compute address and store in PP register
Syntax
dst = [size] [ [[cond]] ] & * addrexp
dst = [size] [ [[cond]] ] & * an.element
Examples
d2 = &*(a3 + x0)
a1 = &*a9.sMY_ELEMENT
Operation
Move
Description Transfer from PP register to PP register
Syntax
dst = [g] [ [[cond]] ] src
Examples
x2 = mf
d1 = g d3
Operation
Field extract move
Description Transfer from PP register to PP register extracting and right-aligning one byte or halfword
Syntax
dst = [sign] [size item]
Example
d3 = ub2 d1
Operation
Field replicate move
Description Transfer from PP register to PP register replicating the least significant byte or least significant halfword to 32 bits
Syntax
dst = r [size] [[cond]] src
Example
d7 = rh d3
Legend:
[]
[[ ]]
g
item
Optional parameter extension
Square brackets ([ ]) must be used
Use global unit
0 = byte0/halfword0, 1 = byte1/halfword1, 2 = byte2, 3 = byte3
cond
sign
size
Condition code
u = unsigned, s = signed
b = byte, h = halfword, w = word (default)
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