301467-005 Datasheet, PDF (9/426 Pages) Intel Corporation – Express Chipset

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11.4.10
11.4.11
11.4.12
PCI Express* I/O Address Mapping (Intel^® 82915G/82915P/82915PL
Only) ................................................................................................... 220
(G)MCH Decode Rules and Cross-Bridge Address Mapping ............ 220
Legacy VGA and I/O Range Decode Rules ....................................... 221
12
Functional Description .................................................................................................... 223
12.1 Host Interface ..................................................................................................... 223
12.1.1 FSB GTL+ Termination....................................................................... 223
12.1.2 FSB Dynamic Bus Inversion ............................................................... 223
12.1.3 APIC Cluster Mode Support ............................................................... 224
12.2 System Memory Controller................................................................................. 224
12.2.1 Memory Organization Modes.............................................................. 224
12.3 System Memory Configuration Registers Overview .......................................... 226
12.3.1 DRAM Technologies and Organization .............................................. 227
12.3.1.1 Rules for Populating DIMM Slots ...................................... 227
12.3.1.2 System Memory Supported Configurations ...................... 228
12.3.1.3 Main Memory DRAM Address Translation and Decoding 228
12.3.2 DRAM Clock Generation .................................................................... 231
12.3.3 Suspend-to-RAM and Resume........................................................... 231
12.3.4 DDR2 On-Die Termination.................................................................. 231
12.3.5 DDR2 Off-Chip Driver Impedance Calibration.................................... 231
12.4 PCI Express* (Intel^® 82915G/82915P82915PL Only)........................................ 232
12.4.1 Transaction Layer ............................................................................... 232
12.4.2 Data Link Layer................................................................................... 232
12.4.3 Physical Layer..................................................................................... 232
12.5 Intel^® Serial Digital Video Output (SDVO) (Intel^®
82915G/82915GV/82915GL/82910GL GMCH Only)......................................... 233
12.5.1 Intel^® SDVO Capabilities..................................................................... 233
12.5.2 Intel^® SDVO Modes ............................................................................ 234
12.6 Integrated Graphics Device (Intel^® 82915G/82915GV/82915GL/82910GL
GMCH Only) ....................................................................................................... 235
12.6.1 3D Engine ........................................................................................... 236
12.6.2 Setup Engine ...................................................................................... 236
12.6.2.1 3D Primitives and Data Formats Support.......................... 236
12.6.2.2 Pixel Accurate “Fast” Scissoring and Clipping Operation . 237
12.6.2.3 Depth Bias ......................................................................... 237
12.6.2.4 Backface Culling................................................................ 237
12.6.2.5 Scan Converter.................................................................. 237
12.6.2.6 Pixel Rasterization Rules .................................................. 237
12.6.2.7 2D Functionality................................................................. 237
12.6.3 Texture Engine.................................................................................... 238
12.6.3.1 Perspective Correct Texture Support................................ 238
12.6.3.2 Texture Formats and Storage ........................................... 238
12.6.3.3 Texture Decompression .................................................... 238
12.6.3.4 Texture ChromaKey .......................................................... 238
12.6.3.5 Anti-Aliasing....................................................................... 238
12.6.3.6 Texture Map Filtering ........................................................ 238
12.6.3.7 Multiple Texture Composition............................................ 239
12.6.3.8 Bi-Cubic Filter (4x4 Programmable Texture Filter) ........... 239
12.6.3.9 Cubic Environment Mapping ............................................. 240
12.6.4 Raster Engine ..................................................................................... 240
12.6.4.1 Texture Map Blending ....................................................... 240
Datasheet
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