301467-005 Datasheet, PDF (40/426 Pages) Intel Corporation – Express Chipset

Signal Description
R
2.4
Signal Name
SDQS_B[7:0]
SDQS_B[7:0]#
SCKE_B[3:0]
SODT_B[3:0]
Type
I/O
SSTL-
2/1.8
2x
I/O
SSTL-1.8
2x
O
SSTL-
2/1.8
O
SSTL-1.8
Description
Data Strobes: For DDR the rising and falling edges of SDQS_Bx are
used for capturing data during read and write transactions. For DDR2,
SDQS_Bx and its complement SDQS_Bx# make up a differential strobe
pair. The data is captured at the crossing point of SDQS_Bx and its
complement SDQS_Bx# during read and write transactions.
Data Strobe Complements (DDR2 only): These signals are the
complementary DDR2 Strobe signals.
Clock Enable: (1 per Rank) SCKE_B is used to initialize the SDRAMs
during power-up, to power-down SDRAM ranks, and to place all SDRAM
ranks into and out of self-refresh during Suspend-to-RAM.
On Die Termination (DDR2 only): Active On-die Termination Control
signals for DDR2 devices.
DDR/DDR2 DRAM Reference and Compensation
Note that the 82910GL, 82915GL, and 82915PL (G)MCH only supports DDR DRAM.
Signal Name
SRCOMP[1:0]
SOCOMP[1:0]
SM_SLEWIN[1:0]
SM_SLEWOUT[1:0]
SMVREF[1:0]
Type
I/O
I/O
A
I
A
O
A
I
A
Description
System Memory RCOMP
DDR2 On-Die DRAM Over Current Detection (OCD) driver
compensation (DDR2 only)
Buffer Slew Rate Input: Slew Rate characterization buffer input for X
and Y orientation.
Buffer Slew Rate Output: Slew Rate characterization buffer output for X
and Y orientation
SDRAM Reference Voltage: Reference voltage inputs for each DQ,
DM, DQS, and DQS# input signals.
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Datasheet