301467-005 Datasheet, PDF (187/426 Pages) Intel Corporation – Express Chipset

Integrated Graphics Device Registers (D2:F0)
(Intel® 82915G/82915GV/82915GL/ 82910GL GMCH Only)
9.1.24
R
MGGC—Mirror of Dev0 GMCH Graphics Control (D2:F0)
(Mirrored_D0_52)
PCI Device:
Function:
Address Offset:
Size:
2
0
52h
16 bits
This register is a Read-Only copy of Device 0, Offset 52h register.
9.1.25
MDEVENdev0f0—Mirror of Dev0 Device Enable (D2:F0)
(Mirrored_D0_54)
PCI Device:
Function:
Address Offset:
Size:
2
0
54h
32 bits
This register is a Read-Only copy of Device 0, Offset 54h register.
9.1.26
BSM—Base of Stolen Memory (D2:F0)
PCI Device:
Address Offset:
Default Value:
Access:
Size:
2
5Ch
07800000h
RO
32 bits
Graphics Stolen Memory and TSEG are within DRAM space defined under TOLUD. From the
top of low used DRAM, GMCH claims 1 to 64 MBs of DRAM for internal graphics, if enabled.
Bit
31:20
19:0
Access &
Default
RO
078h
Description
Base of Stolen Memory (BSM): This register contains bits 31:20 of the base
address of stolen DRAM memory. The host interface determines the base of
Graphics Stolen memory by subtracting the graphics stolen memory size from
TOLUD. See Device 0 TOLUD for more explanation.
Reserved
Datasheet
187