301467-005 Datasheet, PDF (413/426 Pages) Intel Corporation – Express Chipset

Testability
R
Pin Count
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Ball #
E3
H8
F1
J6
G3
K8
H1
L6
J3
P10
K1
M8
L3
N6
M1
P7
N3
R6
P1
H16
DDR Signal Name
EXP_TXP6
EXP_RXP7
EXP_TXP7
EXP_RXP8
EXP_TXP8
EXP_RXP9
EXP_TXP9
EXP_RXP10
EXP_TXP10
EXP_RXP11
EXP_TXP11
EXP_RXP12
EXP_TXP12
EXP_RXP13
EXP_TXP13
EXP_RXP14
EXP_TXP14
EXP_RXP15
EXP_TXP15
BSEL0
Comments
For SDVO interface signal name, see ballout table.
For SDVO interface signal name, see ballout table.
For SDVO interface signal name, see ballout table.
For SDVO interface signal name, see ballout table.
For SDVO interface signal name, see ballout table.
For SDVO interface signal name, see ballout table.
For SDVO interface signal name, see ballout table.
For SDVO interface signal name, see ballout table.
For SDVO interface signal name, see ballout table.
For SDVO interface signal name, see ballout table.
For SDVO interface signal name, see ballout table.
For SDVO interface signal name, see ballout table.
For SDVO interface signal name, see ballout table.
For SDVO interface signal name, see ballout table.
For SDVO interface signal name, see ballout table.
For SDVO interface signal name, see ballout table.
For SDVO interface signal name, see ballout table.
For SDVO interface signal name, see ballout table.
For SDVO interface signal name, see ballout table.
XOR Chain #8 Output
Table 15-12. DDR XOR Chain #9
Pin Count
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Ball #
U6
U5
T3
R3
T8
T9
U1
T1
V8
V7
V3
U3
U10
V10
W5
V5
E15
DDR Signal Name
DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0
DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1
DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2
DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3
BSEL1
Comments
XOR Chain #9 Output
Datasheet
413