301467-005 Datasheet, PDF (42/426 Pages) Intel Corporation – Express Chipset

Signal Description
R
2.6
Analog Display Signals (Intel^®
82915G/82915GV/82915GL/82910GL GMCH Only)
Signal Name
RED
RED#
GREEN
GREEN#
BLUE
BLUE#
REFSET
HSYNC
VSYNC
DDC_CLK
DDC_DATA
Type
O
A
O
A
O
A
O
A
O
A
O
A
O
A
O
2.5 V
CMOS
O
2.5 V
CMOS
I/O
2.5 V
CMOS
I/O
2.5 V
CMOS
Description
RED Analog Video Output: This signal is a CRT Analog video output
from the internal color palette DAC. The DAC is designed for a 37.5 Ω
routing impedance; however, the terminating resistor to ground will be
75 Ω (e.g., 75 Ω resistor on the board, in parallel with a 75 Ω CRT load).
REDB Analog Output: This signal is an analog video output from the
internal color palette DAC. It should be shorted to the ground plane.
GREEN Analog Video Output: This signal is a CRT Analog video
output from the internal color palette DAC. The DAC is designed for a
37.5 Ω routing impedance; however, the terminating resistor to ground
will be 75 Ω (e.g., 75 Ω resistor on the board, in parallel with a 75 Ω CRT
load).
GREENB Analog Output: This signal is an analog video output from the
internal color palette DAC. It should be shorted to the ground plane.
BLUE Analog Video Output: This signal is a CRT Analog video output
from the internal color palette DAC. The DAC is designed for a 37.5 Ω
routing impedance; however, the terminating resistor to ground will be
75 Ω (e.g., 75 Ω resistor on the board, in parallel with a 75 Ω CRT load).
BLUEB Analog Output: This signal is an analog video output from the
internal color palette DAC. It should be shorted to the ground plane.
Resistor Set: Set point resistor for the internal color palette DAC.
A 255 Ω 1% resistor is required between REFSET and motherboard
ground.
CRT Horizontal Synchronization: This signal is used as the horizontal
sync (polarity is programmable) or “sync interval”. 2.5 V output
CRT Vertical Synchronization: This signal is used as the vertical sync
(polarity is programmable). 2.5 V output.
Monitor Control Clock. This signal may be used as the DDC_CLK for a
secondary multiplexed digital display connector.
Monitor Control Data. This signal may be used as the DDC_Data for a
secondary multiplexed digital display connector.
42
Datasheet