301467-005 Datasheet, PDF (213/426 Pages) Intel Corporation – Express Chipset

System Address Map
R
⎯ Addresses decoded to the Memory Mapped Range of the Internal Graphics Device
(MMADR range). There is a MMADR range for device 2 function 0 and a MMADR
range for device 2 function 1. Both ranges are forwarded to the Internal Graphics
Device.
The exceptions listed above for internal graphics and the PCI Express ports MUST NOT overlap
with APCI Configuration, FSB Interrupt Space and High BIOS Address Range.
Figure 11-4. PCI Memory Address Range
FFFF_FFFFh
FFE0_0000h
FEF0_0000h
FEE0_0000h
FED0_0000h
FEC8_0000h
FEC0_0000h
High BIOS
DMI Interface
(subtractively decode)
FSB Interrupts
DMI Interface
(subtractively decode)
Local (processor)
APIC
I/O APIC
DMI Interface
(subtractively decode)
4 GB
4 GB – 2 MB
4 GB – 17 MB
4 GB – 18 MB
4 GB – 19 MB
4 GB – 20 MB
Optional HSEG
FEDA_0000h to
FEDB_FFFFh
F000_0000h
PCI Express
Configuration Space
4 GB – 256 MB
Possible address range
(Not guaranteed)
E000_0000h
DMI Interface
(subtractively decode)
4 GB – 512 MB
Programmable windows,
graphics ranges,
PCI Express* Port
could be here
TOLUD
PCI_Address_Ranges_G-P-only
Datasheet
213