301467-005 Datasheet, PDF (173/426 Pages) Intel Corporation – Express Chipset

Integrated Graphics Device Registers (D2:F0)
(Intel® 82915G/82915GV/82915GL/ 82910GL GMCH Only)
R
9 Integrated Graphics Device
Registers (D2:F0)
(Intel^® 82915G/82915GV/82915GL/
82910GL GMCH Only)
Device 2 contains registers for the internal graphics functions. Table 9-1 lists the PCI
configuration registers in order of ascending offset address. Function 0 can be VGA compatible
or not, this is selected through bit 1 of GGC register (Device 0, offset 52h). The following
sections describe Device 2 PCI configuration registers only.
Table 9-1. Integrated Graphics Device Register Address Map (D2:F0)
Address
Offset
00–01h
02–03h
04–05h
06–07h
08h
Register
Symbol
VID2
DID2
PCICMD2
PCISTS2
RID2
Register Name
Vendor Identification
Device Identification
PCI Command
PCI Status
Revision Identification
09–0Bh
0Ch
0Dh
0Eh
0Fh
10–13h
14–17h
18–1Bh
1C–1Fh
20–2Bh
2C–2Dh
2E–2Fh
30–33h
34h
35–3Bh
CC
CLS
MLT2
HDR2
—
MMADR
IOBAR
GMADR
GTTADR
—
SVID2
SID2
ROMADR
CAPPOINT
—
Class Code
Cache Line Size
Master Latency Timer
Header Type
Reserved
Memory Mapped Range Address
I/O Base Address
Graphics Memory Range Address
Graphics Translation Table Range Address
Reserved
Subsystem Vendor Identification
Subsystem Identification
Video BIOS ROM Base Address
Capabilities Pointer
Reserved
Default
Value
8086h
2582h
0000h
0090h
See register
description
030000h
00h
00h
80h
—
00000000h
00000001h
00000008h
00000000h
—
0000h
0000h
00000000h
D0h
—
Access
RO
RO
RO, R/W
RO
RO
RO
RO
RO
RO
—
RO, R/W
RO, R/W
RO, R/W/L
RO, R/W
—
R/WO
R/WO
RO
RO
—
Datasheet
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